RTC Clock Configuration

Macros
#define	__HAL_RCC_RTC_ENABLE()   (RCC->BDCR |= (RCC_BDCR_RTCEN))
	Macros to enable or disable the RTC clock. More...
#define	__HAL_RCC_RTC_DISABLE()   (RCC->BDCR &= ~(RCC_BDCR_RTCEN))
#define	__HAL_RCC_RTC_CLKPRESCALER(__RTCCLKSource__)
	Macros to configure the RTC clock (RTCCLK). More...
#define	__HAL_RCC_RTC_CONFIG(__RTCCLKSource__)
#define	__HAL_RCC_BACKUPRESET_FORCE()    (RCC->BDCR |= (RCC_BDCR_BDRST))
	Macros to force or release the Backup domain reset. More...
#define	__HAL_RCC_BACKUPRESET_RELEASE()   (RCC->BDCR &= ~(RCC_BDCR_BDRST))

Detailed Description

Macro Definition Documentation

#define __HAL_RCC_BACKUPRESET_FORCE

(

)

(RCC->BDCR |= (RCC_BDCR_BDRST))

Macros to force or release the Backup domain reset.

Note

This function resets the RTC peripheral (including the backup registers) and the RTC clock source selection in RCC_CSR register.

The BKPSRAM is not affected by this reset.

Definition at line 866 of file stm32f7xx_hal_rcc.h.

#define __HAL_RCC_BACKUPRESET_RELEASE

(

)

(RCC->BDCR &= ~(RCC_BDCR_BDRST))

Definition at line 867 of file stm32f7xx_hal_rcc.h.

#define __HAL_RCC_RTC_CLKPRESCALER

(

__RTCCLKSource__

)

Value:

(((__RTCCLKSource__) & RCC_BDCR_RTCSEL) == RCC_BDCR_RTCSEL) ?    \
                                                 MODIFY_REG(RCC->CFGR, RCC_CFGR_RTCPRE, ((__RTCCLKSource__) & 0xFFFFCFF)) : CLEAR_BIT(RCC->CFGR, RCC_CFGR_RTCPRE)

Macros to configure the RTC clock (RTCCLK).

Note

As the RTC clock configuration bits are in the Backup domain and write access is denied to this domain after reset, you have to enable write access using the Power Backup Access macro before to configure the RTC clock source (to be done once after reset).

Once the RTC clock is configured it can't be changed unless the Backup domain is reset using __HAL_RCC_BackupReset_RELEASE() macro, or by a Power On Reset (POR).

Parameters

<strong>RTCCLKSource</strong>

specifies the RTC clock source. This parameter can be one of the following values: RCC_RTCCLKSOURCE_LSE: LSE selected as RTC clock. RCC_RTCCLKSOURCE_LSI: LSI selected as RTC clock. RCC_RTCCLKSOURCE_HSE_DIVx: HSE clock divided by x selected as RTC clock, where x:[2,31]

Note

If the LSE or LSI is used as RTC clock source, the RTC continues to work in STOP and STANDBY modes, and can be used as wakeup source. However, when the HSE clock is used as RTC clock source, the RTC cannot be used in STOP and STANDBY modes.

The maximum input clock frequency for RTC is 1MHz (when using HSE as RTC clock source).

Definition at line 854 of file stm32f7xx_hal_rcc.h.

#define __HAL_RCC_RTC_CONFIG

(

__RTCCLKSource__

)

Value:

do { __HAL_RCC_RTC_CLKPRESCALER(__RTCCLKSource__);    \
                                                    RCC->BDCR |= ((__RTCCLKSource__) & 0x00000FFF);  \
                                                   } while (0)

Definition at line 857 of file stm32f7xx_hal_rcc.h.

#define __HAL_RCC_RTC_DISABLE

(

)

(RCC->BDCR &= ~(RCC_BDCR_RTCEN))

Definition at line 831 of file stm32f7xx_hal_rcc.h.

#define __HAL_RCC_RTC_ENABLE

(

)

(RCC->BDCR |= (RCC_BDCR_RTCEN))

Macros to enable or disable the RTC clock.

Note

These macros must be used only after the RTC clock source was selected.

Definition at line 830 of file stm32f7xx_hal_rcc.h.